Comprehensive test system for DDR5 memory

February 06, 2019 //By Christoph Hammerschmidt
Comprehensive test system for DDR5 memory
Keysight (Santa Rosa, CA) has announced what it claims to be the first comprehensive test solution for DDR 5.0 memory chips. It includes new test solutions for receivers and transmitters as well as protocols and makes it possible to fulfill all test requirements of the DDR5 design specification.

Each new generation of DDR SDRAMs offers higher data transfer speeds, smaller footprint and improved energy efficiency. As the speed of DDR technology increases, engineers face new design and validation challenges. Design fault tolerances are decreasing and signal integrity is becoming increasingly difficult to maintain.

The complete test solution includes transmitter (Tx) to receiver (Rx) software and test fixtures that provide a comprehensive parametric test suite for fully testing and characterizing DDR5 designs. The new receiver and transmitter test solution also includes the powerful M8040A 64 Gbaud high-performance oscilloscope hardware of the BERT and Infiniium UXR series with the lowest noise and jitter floor to enable the most accurate measurement with the highest margins.

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