Micro-scale pre-bond probe array automates tests for chips to be stacked

May 29, 2017 // By Julien Happich
Together with advanced wafer-probe solutions provider Cascade Microtech, nanoelectronics research center IMEC has developed a fully-automatic system for pre-bond testing of advanced 3D chips.

As an emerging technology, 3D IC stacking still has many open options and technical challenges. One of these challenges is probing of the individual chips, before being stacked, to ensure a good yield of the 3D stacked ICs. The inter-chip connections of 3D stacked ICs are made by large arrays of fine-pitch micro-bumps which makes probing these bumps a challenge. Until today, the probing solution is to add dedicated pre-bond probe pads to the to-be-stacked dies, but this requires extra space and design effort and increases test time.


The test system as installed in imec’s Fab-2.

The fully automatic test cell enables probing and hence testing of chips with large arrays of 40µm-pitch micro-bumps, on 300mm wafers.

The system is based on a Cascade Microtech CM300 probe station and National Instruments PXI test instrumentation, complemented by in-house developed software for automatic test generation, data analysis, and visualization.

The system allows testing of wafers up to 300mm diameter, including thinned wafers on tape frame with exposed through-silicon vias.

After several years of intense collaboration between imec and Cascade Microtech, partly supported by the EU-funded FP7 SEA4KET project, good results were achieved with Cascade Microtech’s Pyramid Probe prototype RBI probe cards on imec’s 300mm wafers with 40µm-pitch micro-bumped chips.